CPU Comparison

AMD
AMD

AMD Ryzen 5 PRO 5650GE

CORE STATE Cezanne
CORE SPECS 6 Cores / 12 Threads
CLOCK SPEED 3.4 Base / 4.4 GHz Turbo
CACHE 16 MB
MAX TDP 35W
ARCHITECTURE Zen 3
nm
PROCESS 7 nm
LAUNCH DATE 2021
VS
Intel
INTEL

Core i3-1125G4 (IPU)

CORE STATE Tiger Lake-U
CORE SPECS 4 Cores / 8 Threads
CLOCK SPEED 2000 Base / 3.7 GHz Turbo
CACHE 8 MB (shared)
MAX TDP 15W
ARCHITECTURE Tiger Lake
nm
PROCESS 10 nm
LAUNCH DATE 2021

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
1,559
N/A
cinebench_cinebench_r15_singlecore
219
N/A
cinebench_cinebench_r20_multicore
6,496
N/A
cinebench_cinebench_r20_singlecore
916
N/A
cinebench_cinebench_r23_multicore
15,468
N/A
cinebench_cinebench_r23_singlecore
2,183
N/A
geekbench_multicore
6,994
N/A
geekbench_singlecore
1,921
N/A

DETAILED SPECIFICATIONS

SPECIFICATION
5 PRO 5650GE
i3-1125G4 (IPU)
Core Specs
Cores
6
4 -33.3%
Threads
12
8 -33.3%
Base Clock (GHz)
3.4
2,000 +58723.5%
Boost Clock (GHz)
4.4
3.7 -15.9%
Frequency (GHz)
3.4
2,000 +58723.5%
Turbo Clock (GHz)
4.4
3.7 -15.9%
Multiplier
34
20 -41.2%
SMP CPUs
1
1 0.0%
Cache
L1 Cache
64 KB (per core)
80 KB (per core)
L2 Cache
512 KB (per core)
1.25 MB (per core)
L3 Cache
16 MB
8 MB (shared)
Power
TDP (W)
35
15 -57.1%
PL1
โ€”
12-28 W
PL2
โ€”
52 W
PPT
47 W
โ€”
Architecture
Architecture
Zen 3
Tiger Lake
Codename
Cezanne
Tiger Lake-U
Generation
Ryzen 5 (Zen 3 (Cezanne))
Core i3 (Willow Cove-U)
Process Size
7 nm
10 nm
Transistors
10,700 million
โ€”
Die Size
180 mmยฒ
144 mmยฒ
Foundry
TSMC
Intel
Memory
Memory Support
DDR4
DDR4, LPDDR4X
Memory Bus
Dual-channel
Dual-channel
Memory Bandwidth
51.2 GB/s
โ€”
ECC Memory
Yes
No
DDR4 Speed
โ€”
3200 MT/s
Platform
Socket
AMD Socket AM4
Intel BGA 1449
PCIe
Gen 3, 16 Lanes(CPU only)
Gen 4, 16 Lanes(CPU only)
Graphics
Integrated Graphics
Radeon Vega 7
Iris Xe-LP Graphics G4
Other
Market
Desktop
Mobile
Production Status
Active
End-of-life
Launch Price
โ€”
$281
Part Number
100-000000258
SRK8R
Package
ยตOPGA-1331
FC-BGA1449
Tj Max
โ€”
100ยฐC
View Ryzen 5 PRO 5650GE Details View Core i3-1125G4 (IPU) Details