CPU Comparison

AMD
AMD

AMD EPYC 9124

CORE STATE Genoa
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 3 Base / 3.7 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 200W
ARCHITECTURE Zen 4
nm
PROCESS 5 nm
LAUNCH DATE 2022
VS
AMD
AMD

EPYC 9755

CORE STATE Turin
CORE SPECS 128 Cores / 256 Threads
CLOCK SPEED 2.7 Base / 4.1 GHz Turbo
CACHE 512 MB (shared)
MAX TDP 500W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
3,756
14,250
cinebench_cinebench_r15_singlecore
530
2,011
cinebench_cinebench_r20_multicore
15,652
59,378
cinebench_cinebench_r20_singlecore
2,209
8,382
cinebench_cinebench_r23_multicore
37,269
141,378
cinebench_cinebench_r23_singlecore
5,261
19,959
passmark_data_compression
599,417
4,517,407
passmark_data_encryption
36,078
284,927
passmark_extended_instructions
43,380
303,321
passmark_find_prime_numbers
256
2,047
passmark_floating_point_math
87,057
922,900
passmark_integer_math
148,785
1,549,946
passmark_multithread
43,846
166,328
passmark_physics
3,662
27,806
passmark_random_string_sorting
74,177
571,185
passmark_single_thread
2,719
3,503
passmark_singlethread
2,719
3,503

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9124
EPYC 9755
Core Specs
Cores
16
128 +700.0%
Threads
32
256 +700.0%
Base Clock (GHz)
3
2.7 -10.0%
Boost Clock (GHz)
3.7
4.1 +10.8%
Frequency (GHz)
3
2.7 -10.0%
Turbo Clock (GHz)
3.7
4.1 +10.8%
Multiplier
30
27 -10.0%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
64 KB (per core)
80 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
512 MB (shared)
Power
TDP (W)
200
500 +150.0%
Configurable TDP
200-240 W
450-500 W
Architecture
Architecture
Zen 4
Zen 5
Codename
Genoa
Turin
Generation
EPYC (Zen 4 (Genoa))
EPYC (Zen 5 (Turin))
Process Size
5 nm
4 nm
Transistors
26,280 million
133,040 million
Die Size
4x 72 mm²
16x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR5
DDR5
Memory Bus
Twelve-channel
Twelve-channel
Memory Bandwidth
460.8 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
AMD Socket SP5
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$1083
$12984
Part Number
100-100000802
100-000001443
Package
FC-LGA6096
FC-LGA6096
View EPYC 9124 Details View EPYC 9755 Details