CPU Comparison

A

AMD

AMD

AMD EPYC 4244P

CORE STATE Raphael

CORE SPECS 6 Cores / 12 Threads

CLOCK SPEED 3.8 Base / 5.1 GHz Turbo

CACHE 32 MB (shared)

MAX TDP 65W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2024

VS

A

AMD

AMD

EPYC 9755

CORE STATE Turin

CORE SPECS 128 Cores / 256 Threads

CLOCK SPEED 2.7 Base / 4.1 GHz Turbo

CACHE 512 MB (shared)

MAX TDP 500W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

2,327

14,250

cinebench_cinebench_r15_singlecore

328

2,011

cinebench_cinebench_r20_multicore

9,697

59,378

cinebench_cinebench_r20_singlecore

1,368

8,382

cinebench_cinebench_r23_multicore

23,089

141,378

cinebench_cinebench_r23_singlecore

3,259

19,959

passmark_data_compression

306,693

4,517,407

passmark_data_encryption

18,559

284,927

passmark_extended_instructions

22,253

303,321

passmark_find_prime_numbers

185

2,047

passmark_floating_point_math

45,521

922,900

passmark_integer_math

79,254

1,549,946

passmark_multithread

27,164

166,328

passmark_physics

2,014

27,806

passmark_random_string_sorting

38,751

571,185

passmark_single_thread

3,858

3,503

passmark_singlethread

3,858

3,503

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 4244P

EPYC 9755

Core Specs

Cores

6

128 +2033.3%

Threads

12

256 +2033.3%

Base Clock (GHz)

3.8

2.7 -28.9%

Boost Clock (GHz)

5.1

4.1 -19.6%

Frequency (GHz)

3.8

2.7 -28.9%

Turbo Clock (GHz)

5.1

4.1 -19.6%

Multiplier

38

27 -28.9%

SMP CPUs

1

2 +100.0%

Cache

L1 Cache

64 KB (per core)

80 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

32 MB (shared)

512 MB (shared)

Power

TDP (W)

65

500 +669.2%

PPT

88 W

—

Configurable TDP

—

450-500 W

Architecture

Architecture

Zen 4

Zen 5

Codename

Raphael

Turin

Generation

EPYC (Zen 4 (Raphael))

EPYC (Zen 5 (Turin))

Process Size

5 nm

4 nm

Transistors

6,570 million

133,040 million

Die Size

71 mm²

16x 70.6 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Dual-channel

Twelve-channel

Memory Bandwidth

83.2 GB/s

576.0 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket AM5

AMD Socket SP5

PCIe

Gen 5, 28 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Interconnect

CXL

—

Gen 2.0

Graphics

Integrated Graphics

Radeon Graphics

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$229

$12984

Part Number

100-000001480

100-000001443

Package

FC-LGA1718

FC-LGA6096

Tj Max

95°C

—

View EPYC 4244P Details View EPYC 9755 Details