CPU Comparison

AMD
AMD

AMD EPYC 9745

CORE STATE Turin
CORE SPECS 128 Cores / 256 Threads
CLOCK SPEED 2.4 Base / 3.7 GHz Turbo
CACHE 256 MB (shared)
MAX TDP 400W
ARCHITECTURE Zen 5
nm
PROCESS 3 nm
LAUNCH DATE 2024
VS
AMD
AMD

EPYC 9755

CORE STATE Turin
CORE SPECS 128 Cores / 256 Threads
CLOCK SPEED 2.7 Base / 4.1 GHz Turbo
CACHE 512 MB (shared)
MAX TDP 500W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
11,198
14,250
cinebench_cinebench_r15_singlecore
1,580
2,011
cinebench_cinebench_r20_multicore
46,659
59,378
cinebench_cinebench_r20_singlecore
6,586
8,382
cinebench_cinebench_r23_multicore
111,093
141,378
cinebench_cinebench_r23_singlecore
15,683
19,959
passmark_data_compression
3,929,890
4,517,407
passmark_data_encryption
229,447
284,927
passmark_extended_instructions
280,477
303,321
passmark_find_prime_numbers
979
2,047
passmark_floating_point_math
761,219
922,900
passmark_integer_math
1,224,315
1,549,946
passmark_multithread
130,698
166,328
passmark_physics
17,122
27,806
passmark_random_string_sorting
468,975
571,185
passmark_single_thread
2,806
3,503
passmark_singlethread
2,806
3,503

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9745
EPYC 9755
Core Specs
Cores
128
128 0.0%
Threads
256
256 0.0%
Base Clock (GHz)
2.4
2.7 +12.5%
Boost Clock (GHz)
3.7
4.1 +10.8%
Frequency (GHz)
2.4
2.7 +12.5%
Turbo Clock (GHz)
3.7
4.1 +10.8%
Multiplier
24
27 +12.5%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
80 KB (per core)
80 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
256 MB (shared)
512 MB (shared)
Power
TDP (W)
400
500 +25.0%
Configurable TDP
320-400 W
450-500 W
Architecture
Architecture
Zen 5
Zen 5
Codename
Turin
Turin
Generation
EPYC (Zen 5c (Turin))
EPYC (Zen 5 (Turin))
Process Size
3 nm
4 nm
Transistors
133,040 million
Die Size
16x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR5
DDR5
Memory Bus
Twelve-channel
Twelve-channel
Memory Bandwidth
576.0 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
AMD Socket SP5
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
6 nm
Interconnect
CXL
Gen 2.0
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$12141
$12984
Part Number
100-000001460
100-000001443
Package
FC-LGA6096
FC-LGA6096
View EPYC 9745 Details View EPYC 9755 Details