CPU Comparison

AMD
AMD

AMD EPYC 7663

CORE STATE Milan
CORE SPECS 56 Cores / 112 Threads
CLOCK SPEED 2000 Base / 3.5 GHz Turbo
CACHE 256 MB (shared)
MAX TDP 240W
ARCHITECTURE Zen 3
nm
PROCESS 7 nm
LAUNCH DATE 2021
VS
AMD
AMD

EPYC 9755

CORE STATE Turin
CORE SPECS 128 Cores / 256 Threads
CLOCK SPEED 2.7 Base / 4.1 GHz Turbo
CACHE 512 MB (shared)
MAX TDP 500W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
7,032
14,250
cinebench_cinebench_r15_singlecore
992
2,011
cinebench_cinebench_r20_multicore
29,304
59,378
cinebench_cinebench_r20_singlecore
4,137
8,382
cinebench_cinebench_r23_multicore
69,773
141,378
cinebench_cinebench_r23_singlecore
9,850
19,959
passmark_data_compression
1,447,020
4,517,407
passmark_data_encryption
111,725
284,927
passmark_extended_instructions
73,719
303,321
passmark_find_prime_numbers
676
2,047
passmark_floating_point_math
251,535
922,900
passmark_integer_math
468,096
1,549,946
passmark_multithread
82,087
166,328
passmark_physics
8,020
27,806
passmark_random_string_sorting
184,367
571,185
passmark_single_thread
2,606
3,503
passmark_singlethread
2,606
3,503

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 7663
EPYC 9755
Core Specs
Cores
56
128 +128.6%
Threads
112
256 +128.6%
Base Clock (GHz)
2,000
2.7 -99.9%
Boost Clock (GHz)
3.5
4.1 +17.1%
Frequency (GHz)
2,000
2.7 -99.9%
Turbo Clock (GHz)
3.5
4.1 +17.1%
Multiplier
20
27 +35.0%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
64 KB (per core)
80 KB (per core)
L2 Cache
512 KB (per core)
1 MB (per core)
L3 Cache
256 MB (shared)
512 MB (shared)
Power
TDP (W)
240
500 +108.3%
Configurable TDP
225 W
450-500 W
Architecture
Architecture
Zen 3
Zen 5
Codename
Milan
Turin
Generation
EPYC (Zen 3 (Milan))
EPYC (Zen 5 (Turin))
Process Size
7 nm
4 nm
Transistors
33,200 million
133,040 million
Die Size
8x 81 mm²
16x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR4
DDR5
Memory Bus
Eight-channel
Twelve-channel
Memory Bandwidth
204.8 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP3
AMD Socket SP5
PCIe
Gen 4, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
CCDs
8
Cores per CCD
7
IO Process Size
12 nm
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$6366
$12984
Part Number
100-000000318100-100000318WOF
100-000001443
Package
FCLGA-4094
FC-LGA6096
View EPYC 7663 Details View EPYC 9755 Details