CPU Comparison

AMD
AMD

AMD EPYC 7352

CORE STATE Rome
CORE SPECS 24 Cores / 48 Threads
CLOCK SPEED 2.3 Base / 3.2 GHz Turbo
CACHE 32 MB (per die)
MAX TDP 155W
ARCHITECTURE Zen 2
nm
PROCESS 7 nm
LAUNCH DATE 2019
VS
Intel
INTEL

Xeon 6517P

CORE STATE Granite Rapids
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 3.2 Base / 4.2 GHz Turbo
CACHE 72 MB (shared)
MAX TDP 190W
ARCHITECTURE Granite Rapids
nm
PROCESS 5 nm
LAUNCH DATE 2025

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
3,458
4,247
cinebench_cinebench_r15_singlecore
488
599
cinebench_cinebench_r20_multicore
14,411
17,697
cinebench_cinebench_r20_singlecore
2,034
2,498
cinebench_cinebench_r23_multicore
34,314
42,136
cinebench_cinebench_r23_singlecore
4,844
5,948
passmark_data_compression
660,712
665,506
passmark_data_encryption
44,426
32,978
passmark_extended_instructions
40,203
52,333
passmark_find_prime_numbers
301
315
passmark_floating_point_math
87,969
128,525
passmark_integer_math
148,605
163,563
passmark_multithread
40,370
49,572
passmark_physics
2,688
3,940
passmark_random_string_sorting
69,231
65,031
passmark_single_thread
1,979
3,481
passmark_singlethread
1,979
3,481

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 7352
6517P
Core Specs
Cores
24
16 -33.3%
Threads
48
32 -33.3%
Base Clock (GHz)
2.3
3.2 +39.1%
Boost Clock (GHz)
3.2
4.2 +31.3%
Frequency (GHz)
2.3
3.2 +39.1%
Turbo Clock (GHz)
3.2
4.2 +31.3%
Multiplier
23
32 +39.1%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
96 KB (per core)
112 KB (per core)
L2 Cache
512 KB (per core)
2 MB (per core)
L3 Cache
32 MB (per die)
72 MB (shared)
Total L3
128 MB
Power
TDP (W)
155
190 +22.6%
Configurable TDP
180 W
Architecture
Architecture
Zen 2
Granite Rapids
Codename
Rome
Granite Rapids
Generation
EPYC (Zen 2 (Rome))
Xeon 6 (Granite Rapids-SP)
Process Size
7 nm
5 nm
Transistors
15,200 million
Die Size
4x 74 mm²
Foundry
TSMC
Intel
Memory
Memory Support
DDR4
DDR5
Memory Bus
Eight-channel
Eight-channel
Memory Bandwidth
204.8 GB/s
409.6 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP3
Intel Socket 4710
PCIe
Gen 4, 128 Lanes(CPU only)
Gen 5, 88 Lanes(CPU only)
AMD Multi-Die
CCDs
4
Cores per CCD
6
IO Process Size
14 nm
10 nm
Interconnect
UPI Links
3 x24 24 GT/s
CXL
Gen 2.0, 64 Lanes (Shared with PCI-E)
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$1350
$1195
Part Number
100-000000077
SRVU4
Package
FCLGA-4094
FC-LGA18N
Tj Max
103°C
Bundled Cooler
None
View EPYC 7352 Details View Xeon 6517P Details