CPU Comparison

A

AMD

AMD

AMD EPYC 7352

CORE STATE Rome

CORE SPECS 24 Cores / 48 Threads

CLOCK SPEED 2.3 Base / 3.2 GHz Turbo

CACHE 32 MB (per die)

MAX TDP 155W

ARCHITECTURE Zen 2

nm

PROCESS 7 nm

LAUNCH DATE 2019

VS

A

AMD

AMD

EPYC 9754

CORE STATE Bergamo

CORE SPECS 128 Cores / 256 Threads

CLOCK SPEED 2.25 Base / 3.1 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 360W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2023

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

3,458

8,460

cinebench_cinebench_r15_singlecore

488

1,194

cinebench_cinebench_r20_multicore

14,411

35,254

cinebench_cinebench_r20_singlecore

2,034

4,977

cinebench_cinebench_r23_multicore

34,314

83,939

cinebench_cinebench_r23_singlecore

4,844

11,850

passmark_data_compression

660,712

3,558,043

passmark_data_encryption

44,426

231,891

passmark_extended_instructions

40,203

224,322

passmark_find_prime_numbers

301

604

passmark_floating_point_math

87,969

588,187

passmark_integer_math

148,605

1,026,896

passmark_multithread

40,370

98,752

passmark_physics

2,688

8,793

passmark_random_string_sorting

69,231

306,481

passmark_single_thread

1,979

2,328

passmark_singlethread

1,979

2,328

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 7352

EPYC 9754

Core Specs

Cores

24

128 +433.3%

Threads

48

256 +433.3%

Base Clock (GHz)

2.3

2.25 -2.2%

Boost Clock (GHz)

3.2

3.1 -3.1%

Frequency (GHz)

2.3

2.25 -2.2%

Turbo Clock (GHz)

3.2

3.1 -3.1%

Multiplier

23

22.5 -2.2%

SMP CPUs

2

2 0.0%

Cache

L1 Cache

96 KB (per core)

64 KB (per core)

L2 Cache

512 KB (per core)

1 MB (per core)

L3 Cache

32 MB (per die)

256 MB (shared)

Total L3

128 MB

—

Power

TDP (W)

155

360 +132.3%

Configurable TDP

180 W

320-400 W

Architecture

Architecture

Zen 2

Zen 4

Codename

Rome

Bergamo

Generation

EPYC (Zen 2 (Rome))

EPYC (Zen 4c (Bergamo))

Process Size

7 nm

5 nm

Transistors

15,200 million

71,000 million

Die Size

4x 74 mm²

8x 73 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR4

DDR5

Memory Bus

Eight-channel

Twelve-channel

Memory Bandwidth

204.8 GB/s

460.8 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP3

AMD Socket SP5

PCIe

Gen 4, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

CCDs

4

—

Cores per CCD

6

—

IO Process Size

14 nm

6 nm

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$1350

$11900

Part Number

100-000000077

100-000001234

Package

FCLGA-4094

FC-LGA6096

Bundled Cooler

—

None

View EPYC 7352 Details View EPYC 9754 Details