CPU Comparison

AMD
AMD

AMD EPYC 7303

CORE STATE Milan
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 2.4 Base / 3.4 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 130W
ARCHITECTURE Zen 3
nm
PROCESS 7 nm
LAUNCH DATE 2023
VS
AMD
AMD

EPYC 9755

CORE STATE Turin
CORE SPECS 128 Cores / 256 Threads
CLOCK SPEED 2.7 Base / 4.1 GHz Turbo
CACHE 512 MB (shared)
MAX TDP 500W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
2,448
14,250
cinebench_cinebench_r15_singlecore
345
2,011
cinebench_cinebench_r20_multicore
10,200
59,378
cinebench_cinebench_r20_singlecore
1,439
8,382
cinebench_cinebench_r23_multicore
24,286
141,378
cinebench_cinebench_r23_singlecore
3,428
19,959
passmark_data_compression
428,319
4,517,407
passmark_data_encryption
25,167
284,927
passmark_extended_instructions
31,603
303,321
passmark_find_prime_numbers
180
2,047
passmark_floating_point_math
64,940
922,900
passmark_integer_math
113,422
1,549,946
passmark_multithread
28,572
166,328
passmark_physics
1,792
27,806
passmark_random_string_sorting
42,259
571,185
passmark_single_thread
1,460
3,503
passmark_singlethread
1,460
3,503

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 7303
EPYC 9755
Core Specs
Cores
16
128 +700.0%
Threads
32
256 +700.0%
Base Clock (GHz)
2.4
2.7 +12.5%
Boost Clock (GHz)
3.4
4.1 +20.6%
Frequency (GHz)
2.4
2.7 +12.5%
Turbo Clock (GHz)
3.4
4.1 +20.6%
Multiplier
24
27 +12.5%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
64 KB (per core)
80 KB (per core)
L2 Cache
512 KB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
512 MB (shared)
Power
TDP (W)
130
500 +284.6%
Configurable TDP
120-150 W
450-500 W
Architecture
Architecture
Zen 3
Zen 5
Codename
Milan
Turin
Generation
EPYC (Zen 3 (Milan))
EPYC (Zen 5 (Turin))
Process Size
7 nm
4 nm
Transistors
8,300 million
133,040 million
Die Size
2x 81 mm²
16x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR4
DDR5
Memory Bus
Eight-channel
Twelve-channel
Memory Bandwidth
204.8 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP3
AMD Socket SP5
PCIe
Gen 4, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
CCDs
2
Cores per CCD
8
IO Process Size
12 nm
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$604
$12984
Part Number
100-000001288100-100001288WOF
100-000001443
Package
FCLGA-4094
FC-LGA6096
View EPYC 7303 Details View EPYC 9755 Details