CPU Comparison
AMD
AMD EPYC 9745
CORE STATE
Turin
CORE SPECS
128 Cores / 256 Threads
CLOCK SPEED
2.4 Base / 3.7 GHz Turbo
CACHE
256 MB (shared)
MAX TDP
400W
ARCHITECTURE
Zen 5
PROCESS
3 nm
LAUNCH DATE
2024
VS
INTEL
Xeon D-2752TER
CORE STATE
Ice Lake-D
CORE SPECS
12 Cores / 24 Threads
CLOCK SPEED
1800 Base / 2.8 GHz Turbo
CACHE
20 MB (shared)
MAX TDP
77W
ARCHITECTURE
Ice Lake
PROCESS
10 nm
LAUNCH DATE
2022
PERFORMANCE BENCHMARKS
cinebench_cinebench_r15_multicore
cinebench_cinebench_r15_singlecore
cinebench_cinebench_r20_multicore
cinebench_cinebench_r20_singlecore
cinebench_cinebench_r23_multicore
cinebench_cinebench_r23_singlecore
passmark_data_compression
passmark_data_encryption
passmark_extended_instructions
passmark_find_prime_numbers
passmark_floating_point_math
passmark_integer_math
passmark_multithread
passmark_physics
passmark_random_string_sorting
passmark_single_thread
passmark_singlethread
DETAILED SPECIFICATIONS
SPECIFICATION
EPYC 9745
D-2752TER
Core Specs
Cores
128
12
-90.6%
Threads
256
24
-90.6%
Base Clock (GHz)
2.4
1,800
+74900.0%
Boost Clock (GHz)
3.7
2.8
-24.3%
Frequency (GHz)
2.4
1,800
+74900.0%
Turbo Clock (GHz)
3.7
2.8
-24.3%
Multiplier
24
18
-25.0%
SMP CPUs
2
1
-50.0%
Cache
L1 Cache
80 KB (per core)
80 KB (per core)
L2 Cache
1 MB (per core)
1.25 MB (per core)
L3 Cache
256 MB (shared)
20 MB (shared)
Power
TDP (W)
400
77
-80.8%
Configurable TDP
320-400 W
—
Architecture
Architecture
Zen 5
Ice Lake
Codename
Turin
Ice Lake-D
Generation
EPYC
(Zen 5c (Turin))
Xeon D
(Ice Lake-D)
Process Size
3 nm
10 nm
Foundry
TSMC
Intel
Memory
Memory Support
DDR5
DDR4
Memory Bus
Twelve-channel
Quad-channel
Memory Bandwidth
576.0 GB/s
85.3 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
Intel BGA 2579
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 4, 32 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
—
Interconnect
CXL
Gen 2.0
—
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$12141
$1061
Part Number
100-000001460
SRLCNSRM27
Package
FC-LGA6096
FC-BGA16B