CPU Comparison

A

AMD

AMD

AMD EPYC 9354

CORE STATE Genoa

CORE SPECS 32 Cores / 64 Threads

CLOCK SPEED 3.25 Base / 3.8 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 280W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2022

VS

A

AMD

AMD

EPYC 9655P

CORE STATE Turin

CORE SPECS 96 Cores / 192 Threads

CLOCK SPEED 2.6 Base / 4.5 GHz Turbo

CACHE 384 MB (shared)

MAX TDP 400W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

6,221

13,744

cinebench_cinebench_r15_singlecore

878

1,940

cinebench_cinebench_r20_multicore

25,923

57,268

cinebench_cinebench_r20_singlecore

3,659

8,085

cinebench_cinebench_r23_multicore

61,722

136,354

cinebench_cinebench_r23_singlecore

8,713

19,250

passmark_data_compression

1,168,626

3,478,283

passmark_data_encryption

71,400

219,606

passmark_extended_instructions

86,176

227,538

passmark_find_prime_numbers

934

1,683

passmark_floating_point_math

188,894

710,260

passmark_integer_math

304,828

1,219,189

passmark_multithread

72,615

160,417

passmark_physics

9,281

26,810

passmark_random_string_sorting

140,690

455,310

passmark_single_thread

2,601

3,848

passmark_singlethread

2,601

3,848

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9354

EPYC 9655P

Core Specs

Cores

32

96 +200.0%

Threads

64

192 +200.0%

Base Clock (GHz)

3.25

2.6 -20.0%

Boost Clock (GHz)

3.8

4.5 +18.4%

Frequency (GHz)

3.25

2.6 -20.0%

Turbo Clock (GHz)

3.8

4.5 +18.4%

Multiplier

32.5

26 -20.0%

SMP CPUs

2

1 -50.0%

Cache

L1 Cache

64 KB (per core)

80 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

256 MB (shared)

384 MB (shared)

Power

TDP (W)

280

400 +42.9%

Configurable TDP

240-300 W

320-400 W

Architecture

Architecture

Zen 4

Zen 5

Codename

Genoa

Turin

Generation

EPYC (Zen 4 (Genoa))

EPYC (Zen 5 (Turin))

Process Size

5 nm

4 nm

Transistors

52,560 million

99,780 million

Die Size

8x 72 mm²

12x 70.6 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Twelve-channel

Memory Bandwidth

460.8 GB/s

576.0 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

AMD Socket SP5

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Interconnect

CXL

—

Gen 2.0

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$3420

$10811

Part Number

100-100000798

100-000001522

Package

FC-LGA6096

FC-LGA6096

View EPYC 9354 Details View EPYC 9655P Details