CPU Comparison

AMD
AMD

AMD EPYC 9135

CORE STATE Turin
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 3.65 Base / 4.3 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 200W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024
VS
AMD
AMD

EPYC 9655

CORE STATE Turin
CORE SPECS 96 Cores / 192 Threads
CLOCK SPEED 2.6 Base / 4.5 GHz Turbo
CACHE 384 MB (shared)
MAX TDP 400W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
4,952
13,373
cinebench_cinebench_r15_singlecore
699
1,887
cinebench_cinebench_r20_multicore
20,637
55,722
cinebench_cinebench_r20_singlecore
2,913
7,866
cinebench_cinebench_r23_multicore
49,136
132,672
cinebench_cinebench_r23_singlecore
6,936
18,730
passmark_data_compression
737,167
3,271,019
passmark_data_encryption
40,941
210,541
passmark_extended_instructions
54,795
203,302
passmark_find_prime_numbers
299
1,599
passmark_floating_point_math
125,125
662,949
passmark_integer_math
204,258
1,139,221
passmark_multithread
57,808
156,085
passmark_physics
6,096
25,958
passmark_random_string_sorting
92,226
440,608
passmark_single_thread
3,672
3,845
passmark_singlethread
3,672
3,845

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9135
EPYC 9655
Core Specs
Cores
16
96 +500.0%
Threads
32
192 +500.0%
Base Clock (GHz)
3.65
2.6 -28.8%
Boost Clock (GHz)
4.3
4.5 +4.7%
Frequency (GHz)
3.65
2.6 -28.8%
Turbo Clock (GHz)
4.3
4.5 +4.7%
Multiplier
36.5
26 -28.8%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
80 KB (per core)
80 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
384 MB (shared)
Power
TDP (W)
200
400 +100.0%
Configurable TDP
200-240 W
320-400 W
Architecture
Architecture
Zen 5
Zen 5
Codename
Turin
Turin
Generation
EPYC (Zen 5 (Turin))
EPYC (Zen 5 (Turin))
Process Size
4 nm
4 nm
Transistors
16,630 million
99,780 million
Die Size
2x 70.6 mm²
12x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR5
DDR5
Memory Bus
Twelve-channel
Twelve-channel
Memory Bandwidth
576.0 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
AMD Socket SP5
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
6 nm
Interconnect
CXL
Gen 2.0
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$1214
$11852
Part Number
100-000001150
100-000000674
Package
FC-LGA6096
FC-LGA6096
View EPYC 9135 Details View EPYC 9655 Details