CPU Comparison

AMD
AMD

AMD EPYC 7303

CORE STATE Milan
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 2.4 Base / 3.4 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 130W
ARCHITECTURE Zen 3
nm
PROCESS 7 nm
LAUNCH DATE 2023
VS
AMD
AMD

EPYC 9655

CORE STATE Turin
CORE SPECS 96 Cores / 192 Threads
CLOCK SPEED 2.6 Base / 4.5 GHz Turbo
CACHE 384 MB (shared)
MAX TDP 400W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
2,448
13,373
cinebench_cinebench_r15_singlecore
345
1,887
cinebench_cinebench_r20_multicore
10,200
55,722
cinebench_cinebench_r20_singlecore
1,439
7,866
cinebench_cinebench_r23_multicore
24,286
132,672
cinebench_cinebench_r23_singlecore
3,428
18,730
passmark_data_compression
428,319
3,271,019
passmark_data_encryption
25,167
210,541
passmark_extended_instructions
31,603
203,302
passmark_find_prime_numbers
180
1,599
passmark_floating_point_math
64,940
662,949
passmark_integer_math
113,422
1,139,221
passmark_multithread
28,572
156,085
passmark_physics
1,792
25,958
passmark_random_string_sorting
42,259
440,608
passmark_single_thread
1,460
3,845
passmark_singlethread
1,460
3,845

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 7303
EPYC 9655
Core Specs
Cores
16
96 +500.0%
Threads
32
192 +500.0%
Base Clock (GHz)
2.4
2.6 +8.3%
Boost Clock (GHz)
3.4
4.5 +32.4%
Frequency (GHz)
2.4
2.6 +8.3%
Turbo Clock (GHz)
3.4
4.5 +32.4%
Multiplier
24
26 +8.3%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
64 KB (per core)
80 KB (per core)
L2 Cache
512 KB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
384 MB (shared)
Power
TDP (W)
130
400 +207.7%
Configurable TDP
120-150 W
320-400 W
Architecture
Architecture
Zen 3
Zen 5
Codename
Milan
Turin
Generation
EPYC (Zen 3 (Milan))
EPYC (Zen 5 (Turin))
Process Size
7 nm
4 nm
Transistors
8,300 million
99,780 million
Die Size
2x 81 mm²
12x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR4
DDR5
Memory Bus
Eight-channel
Twelve-channel
Memory Bandwidth
204.8 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP3
AMD Socket SP5
PCIe
Gen 4, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
CCDs
2
Cores per CCD
8
IO Process Size
12 nm
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$604
$11852
Part Number
100-000001288100-100001288WOF
100-000000674
Package
FCLGA-4094
FC-LGA6096
View EPYC 7303 Details View EPYC 9655 Details