CPU Comparison

A

AMD

AMD

AMD EPYC 9555P

CORE STATE Turin

CORE SPECS 64 Cores / 128 Threads

CLOCK SPEED 3.2 Base / 4.4 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 360W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

i

Intel

INTEL

Xeon Phi 7210

CORE STATE Knights Landing

CORE SPECS 64 Cores / 256 Threads

CLOCK SPEED 1300 Base / 1500 GHz Turbo

CACHE —

MAX TDP 215W

ARCHITECTURE Knights Landing

nm

PROCESS 14 nm

LAUNCH DATE 2016

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

11,610

625

cinebench_cinebench_r15_singlecore

1,638

88

cinebench_cinebench_r20_multicore

48,378

2,608

cinebench_cinebench_r20_singlecore

6,829

367

cinebench_cinebench_r23_multicore

115,186

6,210

cinebench_cinebench_r23_singlecore

16,261

876

passmark_data_compression

2,630,921

332,960

passmark_data_encryption

155,805

3,455

passmark_extended_instructions

180,317

18,359

passmark_find_prime_numbers

1,156

10

passmark_floating_point_math

480,435

29,356

passmark_integer_math

821,218

84,874

passmark_multithread

135,513

7,306

passmark_physics

19,907

198

passmark_random_string_sorting

325,662

8,956

passmark_single_thread

3,726

460

passmark_singlethread

3,726

460

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9555P

Phi 7210

Core Specs

Cores

64

64 0.0%

Threads

128

256 +100.0%

Base Clock (GHz)

3.2

1,300 +40525.0%

Boost Clock (GHz)

4.4

1,500 +33990.9%

Frequency (GHz)

3.2

1,300 +40525.0%

Turbo Clock (GHz)

4.4

1,500 +33990.9%

Multiplier

32

13 -59.4%

SMP CPUs

1

1 0.0%

Cache

L1 Cache

80 KB (per core)

32 KB (per core)

L2 Cache

1 MB (per core)

512 KB (per core)

L3 Cache

256 MB (shared)

—

Power

TDP (W)

360

215 -40.3%

Configurable TDP

320-400 W

—

Architecture

Architecture

Zen 5

Knights Landing

Codename

Turin

Knights Landing

Generation

EPYC (Zen 5 (Turin))

Xeon Phi (Knights Landing)

Process Size

4 nm

14 nm

Transistors

66,520 million

8,000 million

Die Size

8x 70.6 mm²

—

Foundry

TSMC

Intel

Memory

Memory Support

DDR5

DDR4

Memory Bus

Twelve-channel

—

Memory Bandwidth

576.0 GB/s

—

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

Intel Socket 3647

PCIe

Gen 5, 128 Lanes(CPU only)

—

AMD Multi-Die

IO Process Size

6 nm

—

Interconnect

CXL

Gen 2.0

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

—

Launch Price

$7983

—

Part Number

100-000001523

SR2MESR2X4

Package

FC-LGA6096

FC-LGA3647

View EPYC 9555P Details View Xeon Phi 7210 Details