CPU Comparison

A

AMD

AMD

AMD EPYC 9555P

CORE STATE Turin

CORE SPECS 64 Cores / 128 Threads

CLOCK SPEED 3.2 Base / 4.4 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 360W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

A

AMD

AMD

EPYC 9634

CORE STATE Genoa

CORE SPECS 84 Cores / 168 Threads

CLOCK SPEED 2.25 Base / 3.7 GHz Turbo

CACHE 384 MB (shared)

MAX TDP 290W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2022

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

11,610

9,248

cinebench_cinebench_r15_singlecore

1,638

1,305

cinebench_cinebench_r20_multicore

48,378

38,535

cinebench_cinebench_r20_singlecore

6,829

5,440

cinebench_cinebench_r23_multicore

115,186

91,752

cinebench_cinebench_r23_singlecore

16,261

12,953

passmark_data_compression

2,630,921

2,236,412

passmark_data_encryption

155,805

151,943

passmark_extended_instructions

180,317

137,543

passmark_find_prime_numbers

1,156

1,176

passmark_floating_point_math

480,435

353,784

passmark_integer_math

821,218

725,356

passmark_multithread

135,513

107,944

passmark_physics

19,907

12,291

passmark_random_string_sorting

325,662

261,134

passmark_single_thread

3,726

2,924

passmark_singlethread

3,726

2,924

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9555P

EPYC 9634

Core Specs

Cores

64

84 +31.3%

Threads

128

168 +31.3%

Base Clock (GHz)

3.2

2.25 -29.7%

Boost Clock (GHz)

4.4

3.7 -15.9%

Frequency (GHz)

3.2

2.25 -29.7%

Turbo Clock (GHz)

4.4

3.7 -15.9%

Multiplier

32

22.5 -29.7%

SMP CPUs

1

2 +100.0%

Cache

L1 Cache

80 KB (per core)

64 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

256 MB (shared)

384 MB (shared)

Power

TDP (W)

360

290 -19.4%

Configurable TDP

320-400 W

240-300 W

Architecture

Architecture

Zen 5

Zen 4

Codename

Turin

Genoa

Generation

EPYC (Zen 5 (Turin))

EPYC (Zen 4 (Genoa))

Process Size

4 nm

5 nm

Transistors

66,520 million

78,840 million

Die Size

8x 70.6 mm²

12x 72 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Twelve-channel

Memory Bandwidth

576.0 GB/s

460.8 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

AMD Socket SP5

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Interconnect

CXL

Gen 2.0

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$7983

$10304

Part Number

100-000001523

100-100000797

Package

FC-LGA6096

FC-LGA6096

View EPYC 9555P Details View EPYC 9634 Details