CPU Comparison

A

AMD

AMD

AMD EPYC 9455P

CORE STATE Turin

CORE SPECS 48 Cores / 96 Threads

CLOCK SPEED 3.15 Base / 4.4 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 300W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

i

Intel

INTEL

Xeon 6517P

CORE STATE Granite Rapids

CORE SPECS 16 Cores / 32 Threads

CLOCK SPEED 3.2 Base / 4.2 GHz Turbo

CACHE 72 MB (shared)

MAX TDP 190W

ARCHITECTURE Granite Rapids

nm

PROCESS 5 nm

LAUNCH DATE 2025

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

9,999

4,247

cinebench_cinebench_r15_singlecore

1,411

599

cinebench_cinebench_r20_multicore

41,666

17,697

cinebench_cinebench_r20_singlecore

5,882

2,498

cinebench_cinebench_r23_multicore

99,206

42,136

cinebench_cinebench_r23_singlecore

14,005

5,948

passmark_data_compression

1,932,632

665,506

passmark_data_encryption

115,202

32,978

passmark_extended_instructions

138,505

52,333

passmark_find_prime_numbers

1,089

315

passmark_floating_point_math

358,673

128,525

passmark_integer_math

606,087

163,563

passmark_multithread

116,713

49,572

passmark_physics

16,647

3,940

passmark_random_string_sorting

241,849

65,031

passmark_single_thread

3,750

3,481

passmark_singlethread

3,750

3,481

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9455P

6517P

Core Specs

Cores

48

16 -66.7%

Threads

96

32 -66.7%

Base Clock (GHz)

3.15

3.2 +1.6%

Boost Clock (GHz)

4.4

4.2 -4.5%

Frequency (GHz)

3.15

3.2 +1.6%

Turbo Clock (GHz)

4.4

4.2 -4.5%

Multiplier

31.5

32 +1.6%

SMP CPUs

1

2 +100.0%

Cache

L1 Cache

80 KB (per core)

112 KB (per core)

L2 Cache

1 MB (per core)

2 MB (per core)

L3 Cache

256 MB (shared)

72 MB (shared)

Power

TDP (W)

300

190 -36.7%

Configurable TDP

240-300 W

—

Architecture

Architecture

Zen 5

Granite Rapids

Codename

Turin

Granite Rapids

Generation

EPYC (Zen 5 (Turin))

Xeon 6 (Granite Rapids-SP)

Process Size

4 nm

5 nm

Transistors

66,520 million

—

Die Size

8x 70.6 mm²

—

Foundry

TSMC

Intel

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Eight-channel

Memory Bandwidth

576.0 GB/s

409.6 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

Intel Socket 4710

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 88 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

10 nm

Interconnect

UPI Links

—

3 x24 24 GT/s

CXL

Gen 2.0

Gen 2.0, 64 Lanes (Shared with PCI-E)

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$4819

$1195

Part Number

100-000001563

SRVU4

Package

FC-LGA6096

FC-LGA18N

Tj Max

—

103°C

Bundled Cooler

—

None

View EPYC 9455P Details View Xeon 6517P Details