CPU Comparison

AMD
AMD

AMD EPYC 9455P

CORE STATE Turin
CORE SPECS 48 Cores / 96 Threads
CLOCK SPEED 3.15 Base / 4.4 GHz Turbo
CACHE 256 MB (shared)
MAX TDP 300W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024
VS
AMD
AMD

EPYC 9634

CORE STATE Genoa
CORE SPECS 84 Cores / 168 Threads
CLOCK SPEED 2.25 Base / 3.7 GHz Turbo
CACHE 384 MB (shared)
MAX TDP 290W
ARCHITECTURE Zen 4
nm
PROCESS 5 nm
LAUNCH DATE 2022

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
9,999
9,248
cinebench_cinebench_r15_singlecore
1,411
1,305
cinebench_cinebench_r20_multicore
41,666
38,535
cinebench_cinebench_r20_singlecore
5,882
5,440
cinebench_cinebench_r23_multicore
99,206
91,752
cinebench_cinebench_r23_singlecore
14,005
12,953
passmark_data_compression
1,932,632
2,236,412
passmark_data_encryption
115,202
151,943
passmark_extended_instructions
138,505
137,543
passmark_find_prime_numbers
1,089
1,176
passmark_floating_point_math
358,673
353,784
passmark_integer_math
606,087
725,356
passmark_multithread
116,713
107,944
passmark_physics
16,647
12,291
passmark_random_string_sorting
241,849
261,134
passmark_single_thread
3,750
2,924
passmark_singlethread
3,750
2,924

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9455P
EPYC 9634
Core Specs
Cores
48
84 +75.0%
Threads
96
168 +75.0%
Base Clock (GHz)
3.15
2.25 -28.6%
Boost Clock (GHz)
4.4
3.7 -15.9%
Frequency (GHz)
3.15
2.25 -28.6%
Turbo Clock (GHz)
4.4
3.7 -15.9%
Multiplier
31.5
22.5 -28.6%
SMP CPUs
1
2 +100.0%
Cache
L1 Cache
80 KB (per core)
64 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
256 MB (shared)
384 MB (shared)
Power
TDP (W)
300
290 -3.3%
Configurable TDP
240-300 W
240-300 W
Architecture
Architecture
Zen 5
Zen 4
Codename
Turin
Genoa
Generation
EPYC (Zen 5 (Turin))
EPYC (Zen 4 (Genoa))
Process Size
4 nm
5 nm
Transistors
66,520 million
78,840 million
Die Size
8x 70.6 mm²
12x 72 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR5
DDR5
Memory Bus
Twelve-channel
Twelve-channel
Memory Bandwidth
576.0 GB/s
460.8 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
AMD Socket SP5
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$4819
$10304
Part Number
100-000001563
100-100000797
Package
FC-LGA6096
FC-LGA6096
View EPYC 9455P Details View EPYC 9634 Details