CPU Comparison

A

AMD

AMD

AMD EPYC 9354

CORE STATE Genoa

CORE SPECS 32 Cores / 64 Threads

CLOCK SPEED 3.25 Base / 3.8 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 280W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2022

VS

A

AMD

AMD

EPYC 9354P

CORE STATE Genoa

CORE SPECS 32 Cores / 64 Threads

CLOCK SPEED 3.25 Base / 3.8 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 280W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2022

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

6,221

6,434

cinebench_cinebench_r15_singlecore

878

908

cinebench_cinebench_r20_multicore

25,923

26,812

cinebench_cinebench_r20_singlecore

3,659

3,785

cinebench_cinebench_r23_multicore

61,722

63,840

cinebench_cinebench_r23_singlecore

8,713

9,012

passmark_data_compression

1,168,626

N/A

passmark_data_encryption

71,400

N/A

passmark_extended_instructions

86,176

N/A

passmark_find_prime_numbers

934

N/A

passmark_floating_point_math

188,894

N/A

passmark_integer_math

304,828

N/A

passmark_multithread

72,615

N/A

passmark_physics

9,281

N/A

passmark_random_string_sorting

140,690

N/A

passmark_single_thread

2,601

N/A

passmark_singlethread

2,601

N/A

geekbench_multicore

N/A

14,214

geekbench_singlecore

N/A

1,605

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9354

EPYC 9354P

Core Specs

Cores

32

32 0.0%

Threads

64

64 0.0%

Base Clock (GHz)

3.25

3.25 0.0%

Boost Clock (GHz)

3.8

3.8 0.0%

Frequency (GHz)

3.25

3.25 0.0%

Turbo Clock (GHz)

3.8

3.8 0.0%

Multiplier

32.5

32.5 0.0%

SMP CPUs

2

1 -50.0%

Cache

L1 Cache

64 KB (per core)

64 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

256 MB (shared)

256 MB (shared)

Power

TDP (W)

280

280 0.0%

Configurable TDP

240-300 W

240-300 W

Architecture

Architecture

Zen 4

Zen 4

Codename

Genoa

Genoa

Generation

EPYC (Zen 4 (Genoa))

EPYC (Zen 4 (Genoa))

Process Size

5 nm

5 nm

Transistors

52,560 million

52,560 million

Die Size

8x 72 mm²

8x 72 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Twelve-channel

Memory Bandwidth

460.8 GB/s

460.8 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

AMD Socket SP5

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$3420

$2730

Part Number

100-100000798

100-100000805

Package

FC-LGA6096

FC-LGA6096

View EPYC 9354 Details View EPYC 9354P Details