CPU Comparison

AMD
AMD

AMD EPYC 9135

CORE STATE Turin
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 3.65 Base / 4.3 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 200W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024
VS
Intel
INTEL

Xeon Gold 5318H

CORE STATE Cooper Lake-SP
CORE SPECS 18 Cores / 36 Threads
CLOCK SPEED 2.5 Base / 3.8 GHz Turbo
CACHE 24.75 MB (shared)
MAX TDP 150W
ARCHITECTURE Cooper Lake
nm
PROCESS 14 nm
LAUNCH DATE 2021

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
4,952
2,510
cinebench_cinebench_r15_singlecore
699
354
cinebench_cinebench_r20_multicore
20,637
10,460
cinebench_cinebench_r20_singlecore
2,913
1,476
cinebench_cinebench_r23_multicore
49,136
24,905
cinebench_cinebench_r23_singlecore
6,936
3,516
passmark_data_compression
737,167
470,916
passmark_data_encryption
40,941
10,743
passmark_extended_instructions
54,795
33,730
passmark_find_prime_numbers
299
141
passmark_floating_point_math
125,125
66,610
passmark_integer_math
204,258
107,603
passmark_multithread
57,808
29,301
passmark_physics
6,096
2,309
passmark_random_string_sorting
92,226
58,841
passmark_single_thread
3,672
2,225
passmark_singlethread
3,672
2,225

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9135
Gold 5318H
Core Specs
Cores
16
18 +12.5%
Threads
32
36 +12.5%
Base Clock (GHz)
3.65
2.5 -31.5%
Boost Clock (GHz)
4.3
3.8 -11.6%
Frequency (GHz)
3.65
2.5 -31.5%
Turbo Clock (GHz)
4.3
3.8 -11.6%
Multiplier
36.5
25 -31.5%
SMP CPUs
2
4 +100.0%
Cache
L1 Cache
80 KB (per core)
64 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
24.75 MB (shared)
Power
TDP (W)
200
150 -25.0%
Configurable TDP
200-240 W
Architecture
Architecture
Zen 5
Cooper Lake
Codename
Turin
Cooper Lake-SP
Generation
EPYC (Zen 5 (Turin))
Xeon Gold (Cooper Lake-SP)
Process Size
4 nm
14 nm
Transistors
16,630 million
Die Size
2x 70.6 mm²
Foundry
TSMC
Intel
Memory
Memory Support
DDR5
DDR4
Memory Bus
Twelve-channel
Six-channel
Memory Bandwidth
576.0 GB/s
128.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
Intel Socket 4189
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 3, 48 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
Interconnect
CXL
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$1214
Part Number
100-000001150
SRJY3CD8070604481600
Package
FC-LGA6096
FC-LGA4189
View EPYC 9135 Details View Xeon Gold 5318H Details