CPU Comparison

A

AMD

AMD

AMD EPYC 9135

CORE STATE Turin

CORE SPECS 16 Cores / 32 Threads

CLOCK SPEED 3.65 Base / 4.3 GHz Turbo

CACHE 64 MB (shared)

MAX TDP 200W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

A

AMD

AMD

EPYC 9354P

CORE STATE Genoa

CORE SPECS 32 Cores / 64 Threads

CLOCK SPEED 3.25 Base / 3.8 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 280W

ARCHITECTURE Zen 4

nm

PROCESS 5 nm

LAUNCH DATE 2022

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

4,952

6,434

cinebench_cinebench_r15_singlecore

699

908

cinebench_cinebench_r20_multicore

20,637

26,812

cinebench_cinebench_r20_singlecore

2,913

3,785

cinebench_cinebench_r23_multicore

49,136

63,840

cinebench_cinebench_r23_singlecore

6,936

9,012

passmark_data_compression

737,167

N/A

passmark_data_encryption

40,941

N/A

passmark_extended_instructions

54,795

N/A

passmark_find_prime_numbers

299

N/A

passmark_floating_point_math

125,125

N/A

passmark_integer_math

204,258

N/A

passmark_multithread

57,808

N/A

passmark_physics

6,096

N/A

passmark_random_string_sorting

92,226

N/A

passmark_single_thread

3,672

N/A

passmark_singlethread

3,672

N/A

geekbench_multicore

N/A

14,214

geekbench_singlecore

N/A

1,605

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9135

EPYC 9354P

Core Specs

Cores

16

32 +100.0%

Threads

32

64 +100.0%

Base Clock (GHz)

3.65

3.25 -11.0%

Boost Clock (GHz)

4.3

3.8 -11.6%

Frequency (GHz)

3.65

3.25 -11.0%

Turbo Clock (GHz)

4.3

3.8 -11.6%

Multiplier

36.5

32.5 -11.0%

SMP CPUs

2

1 -50.0%

Cache

L1 Cache

80 KB (per core)

64 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

64 MB (shared)

256 MB (shared)

Power

TDP (W)

200

280 +40.0%

Configurable TDP

200-240 W

240-300 W

Architecture

Architecture

Zen 5

Zen 4

Codename

Turin

Genoa

Generation

EPYC (Zen 5 (Turin))

EPYC (Zen 4 (Genoa))

Process Size

4 nm

5 nm

Transistors

16,630 million

52,560 million

Die Size

2x 70.6 mm²

8x 72 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Twelve-channel

Memory Bandwidth

576.0 GB/s

460.8 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

AMD Socket SP5

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Interconnect

CXL

Gen 2.0

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$1214

$2730

Part Number

100-000001150

100-100000805

Package

FC-LGA6096

FC-LGA6096

View EPYC 9135 Details View EPYC 9354P Details