CPU Comparison

AMD
AMD

AMD EPYC 9115

CORE STATE Turin
CORE SPECS 16 Cores / 32 Threads
CLOCK SPEED 2.6 Base / 4.1 GHz Turbo
CACHE 64 MB (shared)
MAX TDP 125W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024
VS
AMD
AMD

EPYC 9565

CORE STATE Turin
CORE SPECS 72 Cores / 144 Threads
CLOCK SPEED 3.15 Base / 4.3 GHz Turbo
CACHE 384 MB (shared)
MAX TDP 400W
ARCHITECTURE Zen 5
nm
PROCESS 4 nm
LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore
4,233
11,585
cinebench_cinebench_r15_singlecore
597
1,635
cinebench_cinebench_r20_multicore
17,641
48,273
cinebench_cinebench_r20_singlecore
2,490
6,814
cinebench_cinebench_r23_multicore
42,003
114,937
cinebench_cinebench_r23_singlecore
5,929
16,226
passmark_data_compression
604,120
2,579,631
passmark_data_encryption
33,914
141,936
passmark_extended_instructions
45,686
209,595
passmark_find_prime_numbers
285
2,422
passmark_floating_point_math
115,955
549,422
passmark_integer_math
183,390
717,948
passmark_multithread
49,416
135,221
passmark_physics
4,198
18,036
passmark_random_string_sorting
71,473
291,941
passmark_single_thread
3,377
3,696
passmark_singlethread
3,377
3,696

DETAILED SPECIFICATIONS

SPECIFICATION
EPYC 9115
EPYC 9565
Core Specs
Cores
16
72 +350.0%
Threads
32
144 +350.0%
Base Clock (GHz)
2.6
3.15 +21.2%
Boost Clock (GHz)
4.1
4.3 +4.9%
Frequency (GHz)
2.6
3.15 +21.2%
Turbo Clock (GHz)
4.1
4.3 +4.9%
Multiplier
26
31.5 +21.2%
SMP CPUs
2
2 0.0%
Cache
L1 Cache
80 KB (per core)
80 KB (per core)
L2 Cache
1 MB (per core)
1 MB (per core)
L3 Cache
64 MB (shared)
384 MB (shared)
Power
TDP (W)
125
400 +220.0%
Configurable TDP
120-155 W
320-400 W
Architecture
Architecture
Zen 5
Zen 5
Codename
Turin
Turin
Generation
EPYC (Zen 5 (Turin))
EPYC (Zen 5 (Turin))
Process Size
4 nm
4 nm
Transistors
16,630 million
99,780 million
Die Size
2x 70.6 mm²
12x 70.6 mm²
Foundry
TSMC
TSMC
Memory
Memory Support
DDR5
DDR5
Memory Bus
Twelve-channel
Twelve-channel
Memory Bandwidth
576.0 GB/s
576.0 GB/s
ECC Memory
Yes
Yes
Platform
Socket
AMD Socket SP5
AMD Socket SP5
PCIe
Gen 5, 128 Lanes(CPU only)
Gen 5, 128 Lanes(CPU only)
AMD Multi-Die
IO Process Size
6 nm
6 nm
Interconnect
CXL
Gen 2.0
Gen 2.0
Other
Market
Server/Workstation
Server/Workstation
Production Status
Active
Active
Launch Price
$726
$10486
Part Number
100-000001552
100-000001447
Package
FC-LGA6096
FC-LGA6096
View EPYC 9115 Details View EPYC 9565 Details