Intel Core i7-1165G7 (IPU)

The Intel Core i7-1165G7 (IPU) is a mobile processor from Intel based on the Tiger Lake architecture, carrying the Tiger Lake-U codename and a Core i7 (Willow Cove-U) generation label. The record lists a release date of 2020-09-01, an end-of-life production status, and a launch MSRP of $426. It has 4 cores and 8 threads, a 2.80 base clock, a 4.70 boost clock, and a TDP of 28. No series name is recorded, the benchmarks array is empty, and the nearestRivals array is also empty.

Benchmark Performance

The benchmarks array in the fact pack is empty, so there are no measured scores to analyze. The avgBenchmarkScore field is 0, which leaves the performance section without a single aggregate result. The nearestRivals array is empty as well, meaning there are no named rival processors and no deltaPct values. Because no rival deltas exist, exact percentage leads or deficits cannot be calculated. The only positional field is percentileVsAllCpus, which has the value 50. That places the part at the midpoint of the all-CPU percentile distribution in the dataset, but there is no benchmark average behind that placement. A 50th percentile with an average score of 0 is not a substitute for measured results.

The specification data provides the usual structural context: 4 cores, 8 threads, 2.80 base clock, 4.70 boost clock, 80 KB L1 per core, 1.25 MB L2 per core, and 12 MB shared L3. Those fields, however, are not converted into benchmark scores in this record. The absence of benchmark entries means no statement can be made about how this processor performs relative to any other specific chip. No percentage advantage or deficit can be stated. The data also gives no measured frame for sustained boost behavior in benchmark form. In short, the benchmark section is defined by missing data rather than by scored results.

Power and Thermals

The TDP field is 28, and this is the sole power-envelope figure in the record. The processor is built on a 10 nm Intel process, and the die size is listed as 144 mm². The market segment is mobile. A TDP of 28 in a mobile context points to a cooling tier appropriate for a mobile platform rather than a high-power desktop-class cooling arrangement. The 10 nm process and 144 mm² die are the physical manufacturing details surrounding that thermal envelope.

No thermal test data is included, so sustained thermal behavior cannot be directly observed. The absence of thermal measurements means the cooling analysis depends on the TDP class, the process node, the die size, and the mobile segment. The workload that the cooling solution must handle is defined by the 4-core/8-thread configuration with a 2.80 base clock and a 4.70 boost clock. The end-of-life status does not change the thermal requirement, but it does mean the cooling solution belongs to an already-defined product generation. The record lists no cooler sizes, no additional power figures, and no thermal benchmark results. The relevant thermal envelope in this data is simply the 28 TDP figure on a mobile Tiger Lake part.

Platform and Compatibility

The socket field is Intel BGA 1449. The architecture is Tiger Lake, the codename is Tiger Lake-U, and the generation is listed as Core i7 (Willow Cove-U). Memory support is DDR4 and LPDDR4X over a dual-channel memory bus. ECC memory support is false, so ECC-equipped memory configurations are not covered by this record. No memory bandwidth value is provided.

The PCIe field is Gen 4, 4 Lanes (CPU only), meaning the CPU supplies 4 PCIe Gen 4 lanes. The integrated graphics are Iris Xe-LP Graphics G7 96EU. The multiplier is not unlocked, so user-controlled multiplier adjustment is not supported. The part number is SRK01. Production status is end-of-life, and the release date is 2020-09-01.

Because the only socket listed is Intel BGA 1449 and the production status is end-of-life, the data does not provide an upgrade path to another socket. No alternate socket or platform is recorded. The dual-channel bus and the DDR4/LPDDR4X support define the memory compatibility envelope. The CPU-only PCIe lane count is a key expansion constraint, since only 4 CPU-attached Gen 4 lanes are present. The integrated GPU occupies the graphics role, so a discrete GPU is not listed as required. The locked multiplier limits flexibility on clock adjustment. Overall, the platform facts describe a mobile design on Intel BGA 1449 with DDR4 or LPDDR4X memory and a narrow CPU-attached PCIe Gen 4 allocation.

How It Compares

The nearestRivals array is empty. There are no rival names, no rival scores, and no deltaPct values in the record. The only comparison metric present is percentileVsAllCpus, set to 50. The average benchmark score is 0 and the benchmarks list is empty, so that percentile is not supported by any measured CPU score. The performance position of the Intel Core i7-1165G7 (IPU) is therefore a midpoint percentile with no supporting benchmark data.

No exact percentage lead or deficit over another processor can be stated. The mobile segment and the Tiger Lake/Tiger Lake-U labels provide context, but they are not competitor comparisons. The record does not position this part against any specific rival. It also does not include any comparison to another processor in the same generation or TDP class. The empty nearestRivals list means this section cannot deliver a rival-by-rival analysis. The deltaPct fields would be needed for exact comparisons, but no such entries exist in the record. The only conclusion supported by the comparison data is that the part sits at the 50th percentile of all CPUs in the dataset, with an empty benchmark history behind it.

Single-Thread vs Multi-Thread Behavior

The core count is 4 and the thread count is 8, so the processor presents 8 logical threads across 4 physical cores. The base clock is 2.80 and the boost clock is 4.70. The boost clock is the higher clock figure in the record and is the relevant reference for lightly threaded work. The cache layout is per core for L1 and L2: 80 KB of L1 per core and 1.25 MB of L2 per core, with 12 MB of L3 shared across all cores. This gives each core dedicated local cache while providing a common shared L3 pool.

With 4 cores and 8 threads, multi-thread workloads have 8 logical threads available for concurrent execution. The data does not include benchmark scores, so the actual single-thread versus multi-thread performance gap cannot be measured. The structural indicators are nonetheless present: a 4.70 boost clock for short, lightly threaded bursts, and 8 threads for concurrent work. The shared 12 MB L3 is the cache pool that all cores can use. The per-core L1 and L2 figures mean each core has its own cache hierarchy before reaching the shared L3. The 2.80 base clock represents the lower clock baseline, while the 4.70 boost clock represents the upper clock target. Without benchmark entries, the data cannot show how long the boost clock is maintained or how much performance scales across the 4 cores. The available fields suggest a processor organized for responsive single-thread activity with moderate multi-thread capacity.

Who Should Consider It

This processor is listed with a mobile market segment, so it is aimed at mobile systems rather than desktop builds. The 4-core/8-thread configuration and the 2.80/4.70 clock figures fit workloads that need responsive single-thread activity but do not require very large core counts. General productivity and office-type tasks fall within that profile because they often rely on a handful of threads with short bursts of high clock demand. The integrated Iris Xe-LP Graphics G7 96EU means the platform can provide graphics output without requiring a separate graphics card. That is another mobile-system attribute.

Creation workloads that scale well with many cores will be constrained by the 4-core/8-thread limit, since the record does not list a higher core count. Gaming performance cannot be quantified because there are no benchmark scores. For a system already tied to Intel BGA 1449 and DDR4/LPDDR4X memory, this part could fit a mobile platform in the 28 TDP class. Because production status is end-of-life, new platform designs would have to account for that lifecycle status. The 50th percentile and zero average score do not provide a workload-specific ranking. Workload decisions should therefore rely on the architectural fields: 4 cores, 8 threads, 2.80/4.70 clocks, 12 MB shared L3, and the integrated graphics. The record does not yet supply measured evidence for a more specific recommendation.