AMD EPYC 9335

The AMD EPYC 9335 is a 32-core, 64-thread server processor built on the Zen 5 architecture, codenamed Turin, and part of the broader EPYC 9005 series. It targets the Server/Workstation market segment, operating on the AMD Socket SP5 platform with a 210 W TDP, and is produced on TSMC’s 4 nm process node.

Benchmark Performance

The FACT PACK for the EPYC 9335 lists no direct benchmark scores, an average benchmark score of 0, and a percentile rank of 50 against all CPUs. This percentile figure indicates that the processor sits at the median of the entire benchmark database, though this is likely a placeholder or an artifact of missing data rather than a true reflection of its capability. Without explicit scores or a set of nearest rivals, the analysis must rely on the architectural and specification-level data provided.

The EPYC 9335’s core configuration, 32 cores and 64 threads, places it in the high-core-count segment typical of dual-socket and single-socket enterprise servers. The absence of rival comparisons in the nearestRivals array means no exact percentage deltas can be cited. However, the processor’s position in the EPYC 9005 series, combined with its 4.40 GHz boost clock, suggests it is designed for sustained multi-threaded throughput rather than peak single-core frequency. Benchmark results, when available, would likely show this chip competing favorably in server-oriented workloads that scale with core count, such as database transactions, virtualization, and scientific computing. The 50th percentile rank, if taken literally, would place it below many consumer desktop parts in the database, but that is misleading given the server-class nature of this product, most benchmark databases are skewed toward consumer hardware, and a 50th percentile in such a mixed pool does not reflect its standing among peer server CPUs.

Power and Thermals

The EPYC 9335 carries a TDP of 210 watts, a figure that defines its thermal design envelope. This TDP class is typical for high-core-count server processors that require robust cooling solutions in rack-mounted environments. A 210 W TDP implies the need for a capable air cooler or a low-to-mid-range liquid cooling solution in a workstation chassis, but in standard server deployments, it aligns with the thermal capacity of 1U and 2U heatsink designs that use high-static-pressure fans.

The 4 nm process node from TSMC, with 33,260 million transistors across a die size of 4x 70.6 mm², indicates a dense, power-efficient implementation. The 210 W envelope is allocated across 32 cores, yielding a per-core power budget of roughly 6.56 watts at base operation, though boost behavior can shift power distribution. The twelve-channel DDR5 memory bus with 576.0 GB/s of bandwidth adds to the thermal load, as memory controllers and I/O die components generate additional heat. In practice, the data suggests that the EPYC 9335 will operate within the thermal headroom of standard server infrastructure, with no unusual cooling requirements beyond what is specified for 210 W processors. The lack of an unlocked multiplier further indicates that this is a fixed-TDP part, not intended for overclocking or power-tuning beyond what the platform firmware allows.

Single-Thread vs Multi-Thread Behavior

The EPYC 9335’s clock specifications are a base clock of 3.00 GHz and a boost clock of 4.40 GHz. The 1.40 GHz delta between base and boost is substantial, indicating that the processor can aggressively ramp single-core performance when thermal and power headroom permit. Single-thread performance is critical for legacy workloads, real-time processing, and lightly threaded applications, and the 4.40 GHz boost clock suggests this chip can handle those tasks with reasonable responsiveness, though it is not a specialist in this area.

Multi-thread behavior is where the EPYC 9335 is designed to excel. With 32 cores and 64 threads, the processor can maintain high aggregate throughput, and the 128 MB of shared L3 cache (with 1 MB L2 per core and 80 KB L1 per core) provides a large pool for data shared across cores. The 128 MB L3 is particularly beneficial for workloads with large working sets, such as in-memory databases or analytics, because it reduces the frequency of slower DRAM accesses. The split between single-thread and multi-thread performance is clear: the boost clock handles latency-sensitive tasks, while the core count and cache hierarchy drive parallel workloads. For mixed environments, the EPYC 9335 can prioritize single-thread speed on a few cores while dedicating the rest to batch processing, a behavior typical of Zen 5 architecture with its simultaneous multithreading. The 576.0 GB/s memory bandwidth further supports multi-threaded scaling, ensuring that all 64 threads have sufficient data throughput to avoid stalling on memory fetches.

Who Should Consider It

Based on the specifications, the EPYC 9335 is suited for workloads that demand high core counts and large memory bandwidth. Server virtualization is a primary use case: 32 cores and 64 threads allow for dense VM consolidation, and the 128 MB L3 cache helps maintain performance when multiple virtual machines contend for shared resources. Database workloads, particularly those that are memory-resident, will benefit from the twelve-channel DDR5 support and 576.0 GB/s bandwidth, which reduces transaction latency under high concurrency.

For content creation and rendering, the EPYC 9335 can handle multi-threaded tasks such as 3D rendering, video encoding, and simulation. The 4.40 GHz boost clock ensures that interactive tasks like GUI responsiveness or preview rendering remain fluid, while the core count accelerates final output. Office productivity and general enterprise applications, which are often lightly threaded, will see modest gains from the boost clock, but the processor is overkill for pure office workloads, a lower-core-count part would suffice. Scientific computing and financial modeling, which rely on parallel floating-point operations, are also strong matches given the core count and cache size. The processor is not ideal for gaming, as most games use fewer than 8 cores, and the 210 W TDP plus server socket requirements make it impractical for consumer builds. The data indicates a clear recommendation: adopters should be running multi-threaded, memory-intensive server workloads, not single-threaded desktop applications.

How It Compares

The FACT PACK provides no nearest rivals, so direct comparisons to other specific processors cannot be made with exact percentages or deltas. However, its position within the EPYC 9005 series can be inferred. As a 32-core part, it sits below the higher-core-count SKUs in the same family, which would offer more parallel throughput at the cost of higher TDP and price. The 210 W TDP is moderate for the series, suggesting that it is a balanced option between lower-core-count parts (which would have lower power draw) and 64-core or 96-core flagships (which would exceed 210 W).

Against competing server platforms from other manufacturers, the EPYC 9335’s 128 MB L3 cache and 576.0 GB/s memory bandwidth are defining features. Many rival server chips in this core range offer smaller caches or lower memory bandwidth, which can impact performance in cache-sensitive and bandwidth-bound workloads. The 4 nm process node and TSMC foundry indicate a leading-edge manufacturing advantage that contributes to the 210 W TDP being achievable at 3.00 GHz base across all cores. Without score data, any numeric comparison is impossible, but the architectural profile, 32 Zen 5 cores, 128 MB L3, twelve-channel DDR5, positions the EPYC 9335 as a mid-to-high-tier server processor, likely competitive with other 32-core offerings in its generation, though the absence of benchmark data prevents a quantitative ranking.

FAQ

Q: What is the core and thread count of the AMD EPYC 9335?

A: The EPYC 9335 has 32 cores and 64 threads.

Q: What is the base and boost clock speed?

A: The base clock is 3.00 GHz and the boost clock is 4.40 GHz.

Q: How much L3 cache does it have?

A: It has 128 MB of shared L3 cache, with 1 MB L2 and 80 KB L1 per core.

Q: What memory type and bandwidth does it support?

A: It supports DDR5 memory with a twelve-channel bus, providing 576.0 GB/s of bandwidth, and includes ECC memory support.

Q: What is the TDP and what cooling is implied?

A: The TDP is 210 watts, which implies a standard server-grade cooling solution capable of handling that thermal load, such as a high-performance air cooler or server heatsink.

Q: What socket and platform does it use?

A: It uses the AMD Socket SP5 and is part of the EPYC 9005 series, based on the Zen 5 architecture (codenamed Turin), and was released on October 9, 2024.