AMD EPYC 7373X

Benchmark Performance

The AMD EPYC 7373X occupies a distinctive position in the EPYC 7003 series lineup, built on the Zen 3 architecture with the Milan-X codename. This processor delivers 16 cores and 32 threads, with benchmark results indicating a balanced profile that places it at the 50th percentile among all CPUs tracked in the database. The absence of direct rival comparisons in the dataset means the analysis relies on the architectural characteristics and raw specifications to contextualize its performance class.

The base clock of 3.05 GHz with a boost clock of 3.80 GHz provides a solid frequency envelope for a server processor operating within a 240 W TDP. These clock speeds, combined with the 7 nm process node from TSMC, suggest a design optimized for sustained throughput rather than peak single-core burst performance. The transistor count of 33,200 million spread across 8x 81 mm² dies indicates a complex multi-chiplet arrangement typical of the EPYC architecture, which directly influences how workloads scale across the processor.

The most striking specification is the 768 MB shared L3 cache, which fundamentally changes the performance equation compared to conventional server chips. This massive cache capacity, enabled by the Milan-X 3D stacking technology, allows significantly more data to reside on-die, reducing memory latency penalties in cache-sensitive workloads. Benchmark data shows that such cache configurations typically yield outsized gains in database, virtualization, and scientific computing scenarios where working sets exceed traditional L3 sizes but fit within this expanded pool.

Single-Thread vs Multi-Thread Behavior

The core configuration of 16 cores and 32 threads with a 3.80 GHz boost clock indicates a processor that maintains strong single-thread performance while offering substantial parallel throughput. The base-to-boost frequency delta of 0.75 GHz is moderate, suggesting that the power delivery system can sustain high clocks across multiple cores simultaneously, a critical factor for multi-threaded server workloads.

For single-threaded tasks, the Zen 3 architecture delivers high instructions-per-clock efficiency, and the 3.80 GHz boost clock positions this chip competitively against other server processors in its class. The 64 KB L1 and 512 KB L2 per core provide adequate low-latency storage for individual threads, while the massive L3 cache acts as a shared resource that particularly benefits multi-threaded workloads where data sharing between cores is frequent.

The multi-thread behavior is where this processor differentiates itself. With 32 threads and 768 MB of shared L3, the EPYC 7373X excels in scenarios where multiple threads access overlapping datasets. Benchmark patterns for such cache-rich processors typically show near-linear scaling in virtualization environments, where each virtual machine benefits from both dedicated cores and the shared cache pool. The 240 W TDP class suggests that sustained all-core operation at or near boost clocks is achievable, though the thermal solution must be appropriately matched.

The split between single-thread and multi-thread performance also reveals workload suitability. Applications that are latency-sensitive and single-threaded, such as certain database transaction processing, will benefit from the high boost clock. Conversely, throughput-oriented tasks like batch processing, data analytics, and container orchestration leverage the 32-thread capacity and the cache hierarchy to maintain high utilization across all cores.

Power and Thermals

The EPYC 7373X carries a 240 W TDP, placing it in the upper tier of air-coolable server processors. This power envelope is substantial but not extreme for the EPYC 7003 series, which spans a range of TDP classes. The 7 nm process node from TSMC helps manage power density, while the multi-die layout with 8x 81 mm² chiplets distributes heat generation across the package, aiding thermal management.

For cooling, this TDP class implies the need for a robust server-grade cooling solution. Standard 1U and 2U server heatsinks designed for 240 W processors are sufficient, but operators must ensure adequate airflow within the chassis. The 240 W TDP also has implications for power delivery on the motherboard, requiring VRM designs capable of sustained high-current output.

The relationship between the 3.05 GHz base clock and 3.80 GHz boost clock suggests that the processor can operate at reduced frequencies to stay within power limits under heavy multi-core loads, then boost higher when fewer cores are active. This dynamic behavior is typical of modern server processors and allows the EPYC 7373X to adapt to varying workload intensities without exceeding thermal constraints.

Memory bandwidth of 204.8 GB/s across eight channels adds to the thermal budget, as the memory controllers and I/O die generate additional heat. System integrators should account for the combined thermal load of CPU and memory when designing cooling solutions. The active production status indicates ongoing availability, and the 240 W TDP tier is well-supported across the server ecosystem.

FAQ

Q: What is the launch MSRP of the AMD EPYC 7373X?

A: The launch MSRP is $4185.

Q: How much L3 cache does the EPYC 7373X have?

A: It has 768 MB of shared L3 cache, which is the defining feature of the Milan-X architecture.

Q: What memory configuration does this processor support?

A: It supports DDR4 memory in an eight-channel configuration, providing 204.8 GB/s of memory bandwidth, with ECC memory support enabled.

Q: What socket does the EPYC 7373X use?

A: It uses AMD Socket SP3, which is the standard socket for the EPYC 7003 series.

Q: How many PCIe lanes does the EPYC 7373X provide?

A: It provides 128 PCIe Gen 4 lanes from the CPU, enabling high-bandwidth connectivity for GPUs, NVMe storage, and network adapters.

Q: Is the multiplier unlocked for overclocking?

A: No, the multiplier is locked, which is typical for server processors where stability and consistency are prioritized over user overclocking.

How It Compares

The EPYC 7373X sits within the broader EPYC 7003 series, and its positioning can be understood through architectural comparisons with other members of the family. Within the Milan-X lineup, this 16-core part is a lower-core-count offering compared to higher-end SKUs, but it compensates with the full 768 MB L3 cache, which is the signature feature of the 3D V-Cache-equipped models.

Compared to standard Milan processors with similar core counts, the EPYC 7373X's 768 MB L3 cache provides a significant advantage in workloads that benefit from large on-die storage. The 240 W TDP is higher than typical 16-core server parts, reflecting the additional cache silicon and the power required to keep it fed with data. This tradeoff is favorable for cache-sensitive workloads but less so for power-constrained environments.

Against processors with higher core counts, the EPYC 7373X offers fewer threads but compensates with cache capacity. For example, a 32-core EPYC without 3D V-Cache may outperform in purely parallel throughput, but the 7373X can close the gap in applications where cache misses dominate performance. The benchmark percentile of 50 indicates that this processor sits at the median of all CPUs, reflecting its specialized design that excels in specific niches rather than being a general-purpose leader.

The absence of direct rival data in the nearestRivals field means quantitative comparisons are limited, but the architectural specifications alone position this chip as a strong choice for in-memory databases, high-frequency trading, and large-scale virtualization where the 768 MB L3 cache delivers tangible benefits.

Platform and Compatibility

The AMD EPYC 7373X is built for the AMD Socket SP3 platform, which supports the entire EPYC 7003 series. This socket compatibility provides a straightforward upgrade path within the same generation, allowing systems to swap between different EPYC 7003 processors without changing the motherboard. The SP3 platform is well-established in the server market, with a wide range of motherboards available from major server OEMs and component manufacturers.

Memory support consists of DDR4 in an eight-channel configuration, delivering 204.8 GB/s of bandwidth. This memory architecture is standard for the EPYC 7003 series and supports ECC memory, which is essential for data integrity in server environments. The eight-channel design provides ample bandwidth for memory-intensive workloads, and the large L3 cache on the 7373X reduces the frequency of memory accesses, further improving effective memory performance.

PCIe connectivity is provided through 128 Gen 4 lanes from the CPU, enabling high-speed connections to accelerators, storage, and networking hardware. This lane count supports configurations with multiple GPUs, NVMe storage arrays, and high-bandwidth network interfaces, making the platform suitable for a wide range of server workloads. The Gen 4 interface doubles the bandwidth of the previous generation, ensuring that I/O is not a bottleneck for data-intensive applications.

The EPYC 7373X is part of the EPYC 7003 series, which uses the Zen 3 architecture and is manufactured on TSMC's 7 nm process. The production status is active, meaning the processor is currently available for purchase. The release date of March 2022 places it in the mature phase of its lifecycle, with established BIOS support and platform maturity. The locked multiplier and server-focused feature set indicate that this is a purpose-built part for data center deployments rather than enthusiast use.