CPU Comparison

A

AMD

AMD

AMD EPYC 9755

CORE STATE Turin

CORE SPECS 128 Cores / 256 Threads

CLOCK SPEED 2.7 Base / 4.1 GHz Turbo

CACHE 512 MB (shared)

MAX TDP 500W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

A

AMD

AMD

EPYC Embedded 8224P

CORE STATE Siena

CORE SPECS 24 Cores / 48 Threads

CLOCK SPEED 2.55 Base / 3 GHz Turbo

CACHE 64 MB (shared)

MAX TDP 160W

ARCHITECTURE Zen 4c

nm

PROCESS 5 nm

LAUNCH DATE 2023

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

14,250

4,187

cinebench_cinebench_r15_singlecore

2,011

590

cinebench_cinebench_r20_multicore

59,378

17,447

cinebench_cinebench_r20_singlecore

8,382

2,462

cinebench_cinebench_r23_multicore

141,378

41,542

cinebench_cinebench_r23_singlecore

19,959

5,864

passmark_data_compression

4,517,407

681,754

passmark_data_encryption

284,927

43,619

passmark_extended_instructions

303,321

46,091

passmark_find_prime_numbers

2,047

286

passmark_floating_point_math

922,900

120,066

passmark_integer_math

1,549,946

193,256

passmark_multithread

166,328

48,873

passmark_physics

27,806

4,110

passmark_random_string_sorting

571,185

85,505

passmark_single_thread

3,503

2,357

passmark_singlethread

3,503

2,357

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9755

EPYC Embedded 8224P

Core Specs

Cores

128

24 -81.3%

Threads

256

48 -81.3%

Base Clock (GHz)

2.7

2.55 -5.6%

Boost Clock (GHz)

4.1

3 -26.8%

Frequency (GHz)

2.7

2.55 -5.6%

Turbo Clock (GHz)

4.1

3 -26.8%

Multiplier

27

25.5 -5.6%

SMP CPUs

2

1 -50.0%

Cache

L1 Cache

80 KB (per core)

64 KB (per core)

L2 Cache

1 MB (per core)

1 MB (per core)

L3 Cache

512 MB (shared)

64 MB (shared)

Power

TDP (W)

500

160 -68.0%

Configurable TDP

450-500 W

155-225 W

Architecture

Architecture

Zen 5

Zen 4c

Codename

Turin

Siena

Generation

EPYC (Zen 5 (Turin))

EPYC (Zen 4c (Siena))

Process Size

4 nm

5 nm

Transistors

133,040 million

17,750 million

Die Size

16x 70.6 mm²

2x 73 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR5

DDR5

Memory Bus

Twelve-channel

Six-channel

Memory Bandwidth

576.0 GB/s

230.4 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

AMD Socket SP6

PCIe

Gen 5, 128 Lanes(CPU only)

Gen 5, 96 Lanes(CPU only)

AMD Multi-Die

IO Process Size

6 nm

6 nm

Interconnect

CXL

Gen 2.0

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$12984

—

Part Number

100-000001443

100-000001418

Package

FC-LGA6096

FC-LGA4844

Bundled Cooler

—

None

View EPYC 9755 Details View EPYC Embedded 8224P Details