CPU Comparison

A

AMD

AMD

AMD EPYC 7643P

CORE STATE Milan

CORE SPECS 48 Cores / 96 Threads

CLOCK SPEED 2.3 Base / 3.6 GHz Turbo

CACHE 256 MB (shared)

MAX TDP 225W

ARCHITECTURE Zen 3

nm

PROCESS 7 nm

LAUNCH DATE 2023

VS

A

AMD

AMD

EPYC 9755

CORE STATE Turin

CORE SPECS 128 Cores / 256 Threads

CLOCK SPEED 2.7 Base / 4.1 GHz Turbo

CACHE 512 MB (shared)

MAX TDP 500W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

6,623

14,250

cinebench_cinebench_r15_singlecore

934

2,011

cinebench_cinebench_r20_multicore

27,598

59,378

cinebench_cinebench_r20_singlecore

3,895

8,382

cinebench_cinebench_r23_multicore

65,710

141,378

cinebench_cinebench_r23_singlecore

9,276

19,959

passmark_data_compression

1,326,051

4,517,407

passmark_data_encryption

95,606

284,927

passmark_extended_instructions

67,398

303,321

passmark_find_prime_numbers

651

2,047

passmark_floating_point_math

216,592

922,900

passmark_integer_math

390,775

1,549,946

passmark_multithread

77,307

166,328

passmark_physics

8,002

27,806

passmark_random_string_sorting

160,274

571,185

passmark_single_thread

2,655

3,503

passmark_singlethread

2,655

3,503

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 7643P

EPYC 9755

Core Specs

Cores

48

128 +166.7%

Threads

96

256 +166.7%

Base Clock (GHz)

2.3

2.7 +17.4%

Boost Clock (GHz)

3.6

4.1 +13.9%

Frequency (GHz)

2.3

2.7 +17.4%

Turbo Clock (GHz)

3.6

4.1 +13.9%

Multiplier

23

27 +17.4%

SMP CPUs

1

2 +100.0%

Cache

L1 Cache

64 KB (per core)

80 KB (per core)

L2 Cache

512 KB (per core)

1 MB (per core)

L3 Cache

256 MB (shared)

512 MB (shared)

Power

TDP (W)

225

500 +122.2%

Configurable TDP

240 W

450-500 W

Architecture

Architecture

Zen 3

Zen 5

Codename

Milan

Turin

Generation

EPYC (Zen 3 (Milan))

EPYC (Zen 5 (Turin))

Process Size

7 nm

4 nm

Transistors

33,200 million

133,040 million

Die Size

8x 81 mm²

16x 70.6 mm²

Foundry

TSMC

TSMC

Memory

Memory Support

DDR4

DDR5

Memory Bus

Eight-channel

Twelve-channel

Memory Bandwidth

204.8 GB/s

576.0 GB/s

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP3

AMD Socket SP5

PCIe

Gen 4, 128 Lanes(CPU only)

Gen 5, 128 Lanes(CPU only)

AMD Multi-Die

CCDs

8

—

Cores per CCD

8

—

IO Process Size

12 nm

6 nm

Interconnect

CXL

—

Gen 2.0

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

Active

Launch Price

$2722

$12984

Part Number

100-000001285

100-000001443

Package

FCLGA-4094

FC-LGA6096

View EPYC 7643P Details View EPYC 9755 Details