CPU Comparison

A

AMD

AMD

AMD EPYC 9655P

CORE STATE Turin

CORE SPECS 96 Cores / 192 Threads

CLOCK SPEED 2.6 Base / 4.5 GHz Turbo

CACHE 384 MB (shared)

MAX TDP 400W

ARCHITECTURE Zen 5

nm

PROCESS 4 nm

LAUNCH DATE 2024

VS

i

Intel

INTEL

Xeon Phi 7210

CORE STATE Knights Landing

CORE SPECS 64 Cores / 256 Threads

CLOCK SPEED 1300 Base / 1500 GHz Turbo

CACHE —

MAX TDP 215W

ARCHITECTURE Knights Landing

nm

PROCESS 14 nm

LAUNCH DATE 2016

PERFORMANCE BENCHMARKS

cinebench_cinebench_r15_multicore

13,744

625

cinebench_cinebench_r15_singlecore

1,940

88

cinebench_cinebench_r20_multicore

57,268

2,608

cinebench_cinebench_r20_singlecore

8,085

367

cinebench_cinebench_r23_multicore

136,354

6,210

cinebench_cinebench_r23_singlecore

19,250

876

passmark_data_compression

3,478,283

332,960

passmark_data_encryption

219,606

3,455

passmark_extended_instructions

227,538

18,359

passmark_find_prime_numbers

1,683

10

passmark_floating_point_math

710,260

29,356

passmark_integer_math

1,219,189

84,874

passmark_multithread

160,417

7,306

passmark_physics

26,810

198

passmark_random_string_sorting

455,310

8,956

passmark_single_thread

3,848

460

passmark_singlethread

3,848

460

DETAILED SPECIFICATIONS

SPECIFICATION

EPYC 9655P

Phi 7210

Core Specs

Cores

96

64 -33.3%

Threads

192

256 +33.3%

Base Clock (GHz)

2.6

1,300 +49900.0%

Boost Clock (GHz)

4.5

1,500 +33233.3%

Frequency (GHz)

2.6

1,300 +49900.0%

Turbo Clock (GHz)

4.5

1,500 +33233.3%

Multiplier

26

13 -50.0%

SMP CPUs

1

1 0.0%

Cache

L1 Cache

80 KB (per core)

32 KB (per core)

L2 Cache

1 MB (per core)

512 KB (per core)

L3 Cache

384 MB (shared)

—

Power

TDP (W)

400

215 -46.3%

Configurable TDP

320-400 W

—

Architecture

Architecture

Zen 5

Knights Landing

Codename

Turin

Knights Landing

Generation

EPYC (Zen 5 (Turin))

Xeon Phi (Knights Landing)

Process Size

4 nm

14 nm

Transistors

99,780 million

8,000 million

Die Size

12x 70.6 mm²

—

Foundry

TSMC

Intel

Memory

Memory Support

DDR5

DDR4

Memory Bus

Twelve-channel

—

Memory Bandwidth

576.0 GB/s

—

ECC Memory

Yes

Yes

Platform

Socket

AMD Socket SP5

Intel Socket 3647

PCIe

Gen 5, 128 Lanes(CPU only)

—

AMD Multi-Die

IO Process Size

6 nm

—

Interconnect

CXL

Gen 2.0

—

Other

Market

Server/Workstation

Server/Workstation

Production Status

Active

—

Launch Price

$10811

—

Part Number

100-000001522

SR2MESR2X4

Package

FC-LGA6096

FC-LGA3647

View EPYC 9655P Details View Xeon Phi 7210 Details